1. Field of the Invention
The present invention generally relates to the construction and structure of bipolar transistors and, more particularly, to the construction and structure of high performance heterojunction bipolar transistors.
2. Description of the Prior Art
The bipolar transistor continues to be a basic circuit element in integrated circuits due to its high speed switching capability and current carrying capacity. Consequently, many improvements in bipolar transistors have been made in the past to reduce size and the complexity of device formation while increasing performance capability.
One particularly high performance bipolar transistor type is known as a self-aligned base transistor, an example of which is disclosed in U.S. Pat. 4,319,932 (hereby fully incorporated by reference), to Jambotkar which discloses formation of a raised subcollector, intrinsic base and emitter by implantation through an implantation window. Directional ion etching is used to open the implantation window in the polysilicon base while preserving insulating sidewalls on the window edges.
The self-aligned poly base transistor is characterized by the formation of the base and emitter over a sub-collector in an aperture in an insulator formed on a substrate. The extrinsic base is formed, in accordance with that invention, by a first deposition of polysilicon and the intrinsic base formed by doping through a smaller emitter opening through the extrinsic base. After formation of insulating sidewalls, the emitter is formed by an implantation through the same opening. Alternatively, the emitter can be formed by diffusion through the same opening from a second polysilicon deposition, resulting in a transitor known as a self-aligned double polysilicon transistor which can be constructed together with complementary metal-oxide-semiconductor (CMOS) transistors on a single substrate as disclosed in copending U.S. patent application Ser. No. 07/643,907, by Monkowski et al., filed Jan. 18, 1991 now abandoned, and assigned to the assignee of the present invention. This copending U.S. patent application is hereby fully incorporated by reference. Either process can be made to result in a very thin intrinsic base region and a base-emitter junction of very small area, resulting in high performance.
The formation of a heterojunction in bipolar transistors has been widely recognized as a tool by which the performance of transistors may be extended by introducing additional design flexibility. The use of a semiconductor in the emitter with a wider band gap than that of the base enhances the intrinsic gain of the device and allows a reorganization of the potential profile of the device. Grading the bandgap across the base produces a built-in quasi-electric field which accelerates minority carriers and raises the cut-off frequency and switching speed.
Most heterojunction transistors are generally formed using alloys of group III-V semiconductor materials because of their high electron mobility and the availability of advanced crystal growth techniques such as molecular beam epitaxy (MBE) and metal organic chemical vapor deposition (MOCVD). For providing such heterojunction devices in silicon transistors, two approaches have evolved, respectively utilizing wide (i.e. GaP, SiC or amorphous Si grown on the base) and narrow (i.e. a SiGe alloy base sandwiched between a silicon collector and a silicon emitter) band gap materials. This latter type of transistor is often referred to as a silicon/germanium heterojunction bipolar transistor (SiGe HBT).
Likewise, two approaches to the design of SiGe HBT's have evolved. The first involves producing epitaxially grown silicon emitter and base layers, each layer being uniformly doped. The emitter dopant concentration is lower than the concentration of the base, contrary to the practice in conventional (homojunction) bipolar junction transistors (BJT's ). This permits the use of a thinner base for a given base resistance and lowers the base-emitter junction capacitance and electric field. Difficulty has been encountered, however, in the growing of lightly doped n-type silicon with a ultra high vacuum chemical vapor deposition process in order to form an NPN transistor. Because these devices have typically used a non-self aligned base contact and mesa isolation, their performance has been limited. A further performance limitation results because the emitter dopant is not segregated from the base contacts, thus requiring a trade-off between current carrying capability and emitter-base leakage and capacitance.
In the second approach, the transistor structure resembles the structure of the self-aligned double polysilicon transistor structure described above with the addition of an epitaxial SiGe layer base. The doping profile, however, resembles that of an ordinary bipolar junction transistor. Diffusion from a polysilicon emitter contact produces a heavily doped emitter region which is self-aligned to the emitter contact opening. Ion implantation through the same opening into the epitaxial base layer can also produce a localized increase in collector doping to allow for optimization of current carrying capability without increasing collector capacitance. Using a graded SiGe base 45 nm wide in this type of structure has yielded a 75 GHz cutoff frequency. However, there is a limit to the extent to which this performance can be further improved because of a practical limitation on the base doping level. The base doping level determines the emitter-base junction field, which in turn causes leakage and high emitter capacitance if not limited. In other words, this design cannot be improved by scaling to meet present performance requirements. Also, because the base is not extremely thin, high mole fractions of germanium and/or other alloying materials cannot be used without degrading material quality since the alloying of Germanium causes the layer to become strained and therefore possibly unstable.